Synopsys announced complete IP solution for the PCI Express (PCIe) 6.0 technology that includes controller, PHY and verification IP. The new DesignWare IP for PCIe 6.0 supports the latest features in the standard specification including, 64 GT/s PAM-4 signaling, FLIT mode and L0p power state. The IP solution addresses evolving latency, bandwidth and power-efficiency requirements of high-performance computing, AI and storage SoCs. The PHY enables near zero link downtime using patent-pending diagnostic features.
Source: https://www.helpnetsecurity.com/2021/03/19/synopsys-pci-express-6-0/